B. Kuo, “Floating-Human body Kink-Impact Related Capacitance Behavior out-of Nanometer PD SOI NMOS Gadgets” , EDMS , Taiwan

B. Kuo, “Floating-Human body Kink-Impact Related Capacitance Behavior out-of Nanometer PD SOI NMOS Gadgets” , EDMS , Taiwan

71. G. S. Lin and J. B. Kuo, “Fringing-Created Narrow-Channel-Feeling (FINCE) Associated Capacitance Decisions away from Nanometer FD SOI NMOS Gadgets Having fun with Mesa-Separation Through 3d Simulator” , EDSM , Taiwan ,

72. J. B. Kuo, “Development from Bootstrap Approaches to Reasonable-Current CMOS Digital VLSI Circuits to own SOC Apps” , IWSOC , Banff, Canada ,

P. Yang, “Entrance Misalignment Impact Related Capacitance Behavior from a beneficial 100nm DG FD SOI NMOS Equipment having n+/p+ Poly Greatest/Bottom Gate” , ICSICT , Beijing, China

73. Grams. Y. Liu, N. C. Wang and you can J. B. Kuo, “Energy-Productive CMOS Highest-Load Rider Routine to your Subservient Adiabatic/Bootstrap (CAB) Technique for Lower-Fuel TFT-Liquid crystal display System Software” , ISCAS , Kobe, The japanese ,

74. Y. S. Lin, C. H. Lin, J. B. Kuo and you can K. W. Su, “CGS Capacitance Occurrence off 100nm FD SOI CMOS Gizmos that have HfO2 High-k Gate Dielectric Offered Vertical and you can Fringing Displacement Consequences” , HKEDSSC , Hong kong ,

75. J. B. KUo, C. H. Hsu and you can C. P. Yang, “Gate-Misalignment Related Capacitance Choices out-of a great 100nm DG SOI MOS Products having Letter+/p+ Top/Base Door” , HKEDSSC , Hong-kong ,

76. G. Y. Liu, N. C. Wang and you can J. B. Kuo, “Energy-Successful CMOS High-Stream Rider Circuit to your Complementary Adiabatic/Bootstrap (CAB) Way of Low-Energy TFT-Lcd System Apps” , ISCAS , Kobe, The japanese ,

77. H. P. Chen and you will J. B. Kuo, “An excellent 0.8V CMOS TSPC Adiabatic DCVS Reasoning Routine toward Bootstrap Strategy getting Low-Power VLSI” , ICECS , Israel ,

B. Kuo, “A novel 0

80. J. B. Kuo and you can H. P. Chen, “A minimal-Current CMOS Load Rider to your Adiabatic and you will Bootstrap Tips for Low-Strength System Software” , MWSCAS , Hiroshima, Japan ,

83. Yards. T. Lin, Age. C. Sunrays, and J. B. Kuo, “Asymmetric Door Misalignment Impact on Subthreshold Features DG SOI NMOS Devices Considering Fringing Electric Field-effect” , Electron Gizmos and you will Topic Symposium ,

84. J. B. Kuo, Elizabeth. C. Sunlight, and you may M. T. Lin, “Investigation from Door Misalignment Effect on the fresh new Threshold Current out-of Double-Door (DG) Ultrathin FD SOI NMOS Products Using a tight Design Provided Fringing Digital Field-effect” , IEEE Electron Products having Microwave oven and you may Optoelectronic Programs ,

86. E. https://kissbrides.com/no/kinesiske-bruder/ Shen and you can J. 8V BP-DTMOS Blogs Addressable Recollections Mobile Circuit Produced by SOI-DTMOS Process” , IEEE Fulfilling to the Electron Products and Solid state Circuits , Hong-kong ,

87. P. C. Chen and you can J. B. Kuo, “ic Reasoning Routine Playing with an immediate Bootstrap (DB) Technique for Lowest-voltage CMOS VLSI” , All over the world Symposium on Circuits and Assistance ,

89. J. B. Kuo and you can S. C. Lin, “Compact Dysfunction Design to own PD SOI NMOS Products Given BJT/MOS Effect Ionization to have Liven Circuits Simulation” , IEDMS , Taipei ,

90. J. B. Kuo and you will S. C. Lin, “Compact LDD/FD SOI CMOS Device Design Considering Energy Transportation and you can Self Heating for Liven Circuit Simulation” , IEDMS , Taipei ,

91. S. C. Lin and you may J. B. Kuo, “Fringing-Induced Hindrance Decreasing (FIBL) Outcomes of 100nm FD SOI NMOS Equipment with high Permittivity Door Dielectrics and you can LDD/Sidewall Oxide Spacer” , IEEE SOI Appointment Proc , Williamsburg ,

92. J. B. Kuo and you will S. C. Lin, “The fresh new Fringing Electric Field-effect with the Quick-Route Perception Tolerance Current out-of FD SOI NMOS Equipment having LDD/Sidewall Oxide Spacer Framework” , Hong-kong Electron Gizmos Fulfilling ,

93. C. L. Yang and you will J. B. Kuo, “High-Temperature Quasi-Saturation Model of Highest-Current DMOS Fuel Gadgets” , Hong-kong Electron Devices Conference ,

94. E. Shen and J. B. Kuo, “0.8V CMOS Blogs-Addressable-Thoughts (CAM) Telephone Ciurcuit which have a quick Tag-Compare Abilities Playing with Most PMOS Dynamic-Threshold (BP-DTMOS) Techniques Predicated on Practical CMOS Technical to own Lower-Voltage VLSI Possibilities” , Global Symposium with the Circuits and you will Assistance (ISCAS) Process , Arizona ,

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